From d98f46ce647846b0aa30b2e16a30fd4e152a1bf5 Mon Sep 17 00:00:00 2001 From: Carlos Maiolino Date: Thu, 10 Jul 2025 22:55:07 +0200 Subject: Add new code Signed-off-by: Carlos Maiolino --- msp340/Timers/main.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100755 msp340/Timers/main.c (limited to 'msp340/Timers/main.c') diff --git a/msp340/Timers/main.c b/msp340/Timers/main.c new file mode 100755 index 0000000..59ecbdd --- /dev/null +++ b/msp340/Timers/main.c @@ -0,0 +1,35 @@ +#include + +#define UP 0x0010 // Set MC bits to enable TimerA UP mode +#define ACLK 0x0100 // Configure TimerA to use the aux clock + +#define TIME_LIMIT 5000 // Timer limit + +#define RED_LED 0x0001 +#define WDT_OFF 0x5A80 +#define ENABLE_PINS 0xFFFE + +#define TA_INT_FLAG 0x0001 // TimerA_0 CTL Register bit interrupt flag + // Raised by the timer when it reached its count + +main() { + WDTCTL = WDT_OFF; // Disable watchdog + PM5CTL0 = ENABLE_PINS; // Enable I/O pins + + TA0CCR0 = TIME_LIMIT; // Set Capture/Compare Register to the number we want the + // timer to count. The timer compares its count with the number stored here. + TA0CTL = ACLK | UP; // Setup TimerA_0 to UP mode + + + P1DIR = RED_LED; // Set P1.0 pin as output + + while (1) { + + if (TA0CTL & TA_INT_FLAG) { + P1OUT ^= RED_LED; + + // Reset timer by disabling its interrupt flag + TA0CTL &= ~TA_INT_FLAG; + } + } +} -- cgit v1.2.3