From 8c6fc0c15415b32080a848bbde640e104098cf13 Mon Sep 17 00:00:00 2001 From: Carlos Maiolino Date: Thu, 10 Jul 2025 22:18:39 +0200 Subject: Initial drop Add some riscv code Signed-off-by: Carlos Maiolino --- riscv/riscv-probe/env/virt/setup.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 riscv/riscv-probe/env/virt/setup.c (limited to 'riscv/riscv-probe/env/virt/setup.c') diff --git a/riscv/riscv-probe/env/virt/setup.c b/riscv/riscv-probe/env/virt/setup.c new file mode 100644 index 0000000..dcd87a3 --- /dev/null +++ b/riscv/riscv-probe/env/virt/setup.c @@ -0,0 +1,17 @@ +// See LICENSE for license details. + +#include "femto.h" + +auxval_t __auxv[] = { + { UART0_CLOCK_FREQ, 1843200 }, + { UART0_BAUD_RATE, 115200 }, + { NS16550A_UART0_CTRL_ADDR, 0x10000000 }, + { SIFIVE_TEST_CTRL_ADDR, 0x100000 }, + { 0, 0 } +}; + +void arch_setup() +{ + register_console(&console_ns16550a); + register_poweroff(&poweroff_sifive_test); +} -- cgit v1.2.3