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Diffstat (limited to 'riscv/riscv-probe/env/default')
-rw-r--r--riscv/riscv-probe/env/default/crt.s1
-rw-r--r--riscv/riscv-probe/env/default/default.lds45
-rw-r--r--riscv/riscv-probe/env/default/setup.c9
3 files changed, 55 insertions, 0 deletions
diff --git a/riscv/riscv-probe/env/default/crt.s b/riscv/riscv-probe/env/default/crt.s
new file mode 100644
index 0000000..dcdf1e1
--- /dev/null
+++ b/riscv/riscv-probe/env/default/crt.s
@@ -0,0 +1 @@
+.include "crtm.s"
diff --git a/riscv/riscv-probe/env/default/default.lds b/riscv/riscv-probe/env/default/default.lds
new file mode 100644
index 0000000..c103c78
--- /dev/null
+++ b/riscv/riscv-probe/env/default/default.lds
@@ -0,0 +1,45 @@
+OUTPUT_ARCH( "riscv" )
+
+ENTRY( _start )
+
+MEMORY
+{
+ ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 128M
+}
+
+PHDRS
+{
+ text PT_LOAD;
+ data PT_LOAD;
+ bss PT_LOAD;
+}
+
+SECTIONS
+{
+ .text : {
+ PROVIDE(_text_start = .);
+ *(.text.init) *(.text .text.*)
+ PROVIDE(_text_end = .);
+ } >ram AT>ram :text
+
+ .rodata : {
+ PROVIDE(_rodata_start = .);
+ *(.rodata .rodata.*)
+ PROVIDE(_rodata_end = .);
+ } >ram AT>ram :text
+
+ .data : {
+ PROVIDE(_data_start = .);
+ *(.sdata .sdata.*) *(.data .data.*)
+ PROVIDE(_data_end = .);
+ } >ram AT>ram :data
+
+ .bss :{
+ PROVIDE(_bss_start = .);
+ *(.sbss .sbss.*) *(.bss .bss.*)
+ PROVIDE(_bss_end = .);
+ } >ram AT>ram :bss
+
+ PROVIDE(_memory_start = ORIGIN(ram));
+ PROVIDE(_memory_end = ORIGIN(ram) + LENGTH(ram));
+}
diff --git a/riscv/riscv-probe/env/default/setup.c b/riscv/riscv-probe/env/default/setup.c
new file mode 100644
index 0000000..47674ca
--- /dev/null
+++ b/riscv/riscv-probe/env/default/setup.c
@@ -0,0 +1,9 @@
+// See LICENSE for license details.
+
+#include "femto.h"
+
+auxval_t __auxv[] = {
+ { 0, 0 }
+};
+
+void arch_setup() {}