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-rw-r--r--riscv/riscv-probe/env/semihost/crt.s28
-rw-r--r--riscv/riscv-probe/env/semihost/default.lds45
-rw-r--r--riscv/riscv-probe/env/semihost/setup.c12
3 files changed, 85 insertions, 0 deletions
diff --git a/riscv/riscv-probe/env/semihost/crt.s b/riscv/riscv-probe/env/semihost/crt.s
new file mode 100644
index 0000000..b75cba8
--- /dev/null
+++ b/riscv/riscv-probe/env/semihost/crt.s
@@ -0,0 +1,28 @@
+# See LICENSE for license details.
+
+.include "macros.s"
+.include "constants.s"
+
+#
+# start of trap handler
+#
+
+.section .text.init,"ax",@progbits
+.globl _start
+
+_start:
+
+ # set up stack pointer based on hartid (in a0)
+ mv t0, a0
+ slli t0, t0, STACK_SHIFT
+ la sp, stacks + STACK_SIZE
+ add sp, sp, t0
+
+ # jump to libfemto_start_main
+ j libfemto_start_main
+
+ .bss
+ .align 4
+ .global stacks
+stacks:
+ .skip STACK_SIZE * MAX_HARTS
diff --git a/riscv/riscv-probe/env/semihost/default.lds b/riscv/riscv-probe/env/semihost/default.lds
new file mode 100644
index 0000000..c103c78
--- /dev/null
+++ b/riscv/riscv-probe/env/semihost/default.lds
@@ -0,0 +1,45 @@
+OUTPUT_ARCH( "riscv" )
+
+ENTRY( _start )
+
+MEMORY
+{
+ ram (wxa!ri) : ORIGIN = 0x80000000, LENGTH = 128M
+}
+
+PHDRS
+{
+ text PT_LOAD;
+ data PT_LOAD;
+ bss PT_LOAD;
+}
+
+SECTIONS
+{
+ .text : {
+ PROVIDE(_text_start = .);
+ *(.text.init) *(.text .text.*)
+ PROVIDE(_text_end = .);
+ } >ram AT>ram :text
+
+ .rodata : {
+ PROVIDE(_rodata_start = .);
+ *(.rodata .rodata.*)
+ PROVIDE(_rodata_end = .);
+ } >ram AT>ram :text
+
+ .data : {
+ PROVIDE(_data_start = .);
+ *(.sdata .sdata.*) *(.data .data.*)
+ PROVIDE(_data_end = .);
+ } >ram AT>ram :data
+
+ .bss :{
+ PROVIDE(_bss_start = .);
+ *(.sbss .sbss.*) *(.bss .bss.*)
+ PROVIDE(_bss_end = .);
+ } >ram AT>ram :bss
+
+ PROVIDE(_memory_start = ORIGIN(ram));
+ PROVIDE(_memory_end = ORIGIN(ram) + LENGTH(ram));
+}
diff --git a/riscv/riscv-probe/env/semihost/setup.c b/riscv/riscv-probe/env/semihost/setup.c
new file mode 100644
index 0000000..407ee14
--- /dev/null
+++ b/riscv/riscv-probe/env/semihost/setup.c
@@ -0,0 +1,12 @@
+// See LICENSE for license details.
+
+#include "femto.h"
+
+auxval_t __auxv[] = {
+ { 0, 0 }
+};
+
+void arch_setup() {
+ register_console(&console_semihost);
+ register_poweroff(&poweroff_semihost);
+}